Using of Behavioral level AMS & RF Simulation for Validation Test set Optimization

The expansion of Wireless Systems-on-Chip leads to a rapid development of new design and test methods. In this paper, the test benches defined for design validation or characterization of AMS & RF SoCs are first optimized and then re-used for production testing. Although the original validation test set allows the verification of both design functionalities and performances, this test set is not well adapted to manufacturing test due to its high execution time and high test equipments costs requirement. The optimization of this validation set is based on the evaluation of each test stimuli. This evaluation relies on a high level faults simulation method. Hence, a fault model based on the variations of behavioral parameters and its related qualification metric are presented. This approach is used on the receiver part of a WCDMA transceiver. The test bench optimization realized is evaluated for manufacturing test thanks to structural fault coverage measurements.